Program (Schedule) updated on May 19th

Program formatted in PDF is here.

June 15 (Mon.)

11:00-17:30 Registration

13:00-15:25 SSV2009, Oral Session 1 (Hall 2)

Chairs: Vasili Semenov (Stony Brook Univ.) and Nobuyuki Yoshikawa (Yokohama National Univ.)
 
13:00-13:10 Opening Remarks
 
13:10-13:40 I1 (Invited):  Oleg Mukhanov (HYPRES)
RSFQ LSI Technology in HYPRES
 
13:40-14:10 I2 (Invited):  Farhad Mehdipour, Hiroaki Honda, Hiroshi Kataoka, Koji Inoue, Kazuaki Murakami (Kyushu Univ., CREST-JST)
Optimizing the Architectures of SFQ-RDP (Single Flux Quantum- Reconfigurable Datapath)
 
14:10-14:25 O1:  Kazuyoshi Takagi, Yuki Ito, Masamitsu Tanaka and Naofumi Takagi (Nagoya Univ., CREST-JST)
A Method for Layout-Driven Skewed Clock Tree Synthesis for SFQ Circuits
 
14:25-14:40 O2:  Thomas Ortlepp (Ilumenau Univ. of Tech.)
Josephson-Inductance-Based RSFQ Circuits with Reduced Critical Current Density
 
14:40-14:55 O3:  Yoshinao Mizugaki, Ryuta Kashiwa, Akio Kawai, Masataka Moriya, Tadayuki Kobayashi (The Univ. of Electro-Communications)
Magnetic Isolation Enhanced by the Meissner Effect of a Superconducting Loop in Multi-Layered Nb Integrated Circuits
 
14:55-15:10 O4:  Masamitsu Tanaka, Kazuyoshi Takagi, Naofumi Takagi (Nagoya Univ., CREST-JST), Yuki Yamanashi, Nobuyuki Yoshikawa (Yokohama National Univ., CREST-JST)
High-Throughput Arithmetic Circuits based on Systolic Architecture for SFQ Reconfigurable Data-Path
 
15:10-15:25 O5:  Irina Kataeva, Hiroyuki Akaike, Akira Fujimaki (Nagoya Univ., CREST-JST), Nobuyuki Yoshikawa (Yokohama National Univ., CREST-JST), Naofumi Takagi (Nagoya Univ., CREST-JST)
A Crossbar Switch for Routing of 2-bit Wide Data Streams
 
15:25-15:40 O6:  Mikhail Dorojevets, Christopher Ayala (Stony Brook Univ.)
Logical Design and Analysis of a 32-/64-bit Wave-Pipelined RSFQ Adder
 

15:40-16:00 Coffee Break

16:00-17:30 SSV2009, Poster Session (Lobby)

P1: Y. Natsume, M. Igarashi, Y. Yamanashi, N. Yoshikawa (Yokohama National Univ.)
Numerical Simulation of Magnetic Shielding Effect in Superconducting Shield Structures
 
P2: Yuki Suzukawa, Taino Tohru, Hiroaki Myoren (Saitama Univ.)
Propagation Property of Sub-Micron-Wide Superconducting Microstrip Lines for SFQ Circuits
 
P3: Yoshinao Mizugaki, Akio Kawai, Ryuta Kashiwa, Masataka Moriya, Tadayuki Kobayashi (The Univ. of Electro-Communications)
Mutual Inductance between Two Strip Lines Sandwiched by Two Ground Planes
 
P4: Naoki Takeuchi, Hidetoshi Suzuki, Yuki Yamanashi, Nobuyuki Yoshikawa (Yokohama National Univ.)
Design of Miniaturized Superconducting Passive Delay Lines for RSFQ Circuits
 
P5: Shota Takeshima, Kazuyoshi Takagi, Masamitu Tanaka, Naofumi Takagi (Nagoya Univ., CREST-JST)
Automated Routing Method for Multi-Layered SFQ Circuits
 
P6: Motoki Sato, Kazuyoshi Takagi, Masamitsu Tanaka, Naofumi Takagi (Nagoya Univ., CREST-JST)
Verification Method of Pipeline Processing Behavior of SFQ Circuits
 
P7: Ryo Kasagi, Katsumi Takagi, Masato Ito, Masamitsu Tanaka, Hiroyuki Akaike, Akira Fujimaki (Nagoya Univ., CREST-JST)
Timing Issues in Large-Scale RDP Processors
 
P8: T. Kainuma, H. Suzuki, Y. Yamanashi, N. Yoshikawa (Yokohama National Univ., CREST-JST), M. Tanaka, A. Fujimaki (Nagoya Univ., CREST-JST)
Evaluation of Logic-Level Simulation using the Single-Flux-Quantum Cell Library for the 10 kA/cm2 Nb Multi-Layer Process
 
P9: D. Ozawa, Y. Natsume, Y. Yamanashi, N. Yoshikawa (Yokohama National Univ.)
Investigation of Multi-Flux Drivers using High-bc Junctions
 
P10: H. Jin, Y. Okamoto, K. Yaguchi, Y. Yamanashi, N. Yoshikawa (Yokohama National Univ.)
Investigation of Characteristic Variations of Wholly CMOS Amplifiers for Josephson/CMOS Hybrid Memories
 
P11: K. Yaguchi, Y. Okamoto, H. Jin, H. Park, Y. Yamanashi, N. Yoshikawa (Yokohama National Univ.), T. Van Duzer (UC Berkeley)
Implementation of a Self-Bias Circuit for Josephson-CMOS Hybrid Memories
 
P12: Sakae Sakuraba, Takeshi Onomi, Koji Nakajima (Tohoku Univ.)
4-bit Parallel Adder for a Fast Fourier Transform System
 
P13: W.H. Kim, Y. Yamanashi, K. Taketomi, H.J. Park, T. Kainuma, N. Yoshikawa (Yokohama National Univ.)
Implementation of a User Interface System for SFQ Microprocessors
 
P14: Yoshihito Hashimoto, Hideo Suzuki, Mutsuo Hidaka (ISTEC-SRL)
Experiments of Heat Removal from Superconductive Multi-Chip Module Cooled by a Cryo-Cooler
 
P15: Shigeyuki Miyajima (Nagoya Univ.), Ali Bozbey (TOBB ETU), Shigeki Nakamura, Yosuke Higashi, Akira Fujimaki (Nagoya Univ.)
Investigation of the Bias Current Dependence of Gray Zone in Quasi-One-Junction SQUID Comparators
 
P16: T. Okumura, S. Tsutsumi, M. Nirmal, H. Akaike, A. Fujimaki (Nagoya Univ.), K. Maezawa (Toyama Univ.)
Fabrication of HEMT-Implanted Superconductor Circuit with Broadband Interconnects
 
P17:  T. Satoh, K. Hinode, S. Nagasawa, M. Hidaka (ISTEC-SRL)
Fabrication and characterization of 40 kA/cm2 Nb/AlOx/Nb Josephson junctions
 

18:30-20:30 SSV2009, Banquet


June 16 (Tue.)

8:40-10:00 Registration

9:00-11:00 SSV2009, Oral Session 2 (Main Hall)

Chairs: Oleg Mukhanov (HYPRES), Hiroyuki Akaike (Nagoya Univ.)
 
9:00-9:30 I3 (Invited): Vasili Semenov (Stony Brook Univ.)
Fundamentals of RSFQ LSIs
 
9:30-10:00 I4 (Invited):  Nobuyuki Yoshikawa (Yokohama National Univ.)
Recent Research Activities in the MEXT SFQ Project
 
10:00-10:15 O7:  Hiroaki Myoren, Satoshi Iino, Tohru Taino (Saitama Univ.)
On-Chip SFQ Flux-Locked Loop Circuits for Digital DROS Sensors
 
10:30-10:45 O8:  M. Hidaka, T. Satoh, K. Hinode, S. Nagasawa (ISTEC-SRL)
Fabrication Process for Nb Devices in ISTEC/SRL
 
10:30-10:45 O9:  S. Bouat, P. Cavalier, L. Maingault, V. Michal, J-C Villegier (CEA INAC Grenoble), R. Espiau de Lamaëstre, L. Frey, D. Renaud, C. Socquet-Clerc (CEA LETI Grenoble), P. Desgreys, R. Guelaz, P. Loumeau (TELECOM ParisTech)
NbN integrated SFQ Electronics Combined with Photonics on Silicon
 
10:45-11:00 O10:  Naoki Mitamura, Chikaze Maruyama, Hiroyuki Akaike, Akira Fujimaki (Nagoya Univ.), Rintaro Ishii, Yoshihiro Niihara, Michio Naito (Tokyo Univ. of Agriculture and Technology)
Electrical Properties of All MgB2 Josephson Junctions with Different Tunnel Barriers
 

11:00-11:25 Closing and Group Photo


SSV2009-JSPS Joint Workshop

13:30-15:10 Session 1 (SSV Session, Supported by JST) (Main Hall)

Chairs: Thomas Ortlepp (Ilumenau Univ. of Tech.) and Akira Fujimaki (Nagoya Univ.)
 
13:30-13:40 Opening Remarks
 
13:40-14:10 I6 (Invited):  Pascal Febvre (Univ. of Savoie, France)
Digital Magnetometers Based on the Single-Flux-Quantum Technique
 
14:10-14:40 I7 (Invited):  David Olaya (NIST, USA)
New Junction Technology for Integrated Circuits
 
14:40-15:10 I8 (Invited): Masashi Mukaida (Kyushu Univ., Japan)
The Present State and Subjects in Iron Family Superconducting Films
 

15:10-15:30 Coffee Break

15:30-17:40 Session 2 (JSPS Session)

Chairs:
 
15:30-16:10 WS1: John Clarke (UC Berkley, USA)
Progress in SQUID Microtesla NMR and MRI
 
16:10-16:50 WS2: J. Chen, M. Liang, L. Kang, B. B. Jin, W. W. Xu, P. H. Wu (Nanjing Univ., China) W. Zhang, L. Jiang, S.C. Shi (PMO, China)
Low Noise Superconducting Hot Electron Bolometers at Terahertz Waveband
 
16:50-17:30 WS3: Takashi Noguchi (NAOJ, Japan)
Superconducting Tunnel Junction Detectors for Submillimeter-wave Astronomy
 
17:30-17:40 Closing

June 17 (Wed.)

10:20-12:20 Session of Signal Processing in ISEC2009
(Organized by SSV2009 and ISEC2009, Supported by JST.)

Chair: Oleg Mukhanov
Co-Chair: Yoshinao Mizugaki
 
10:20-10:40 SP-O1 (Invited): Leonardo DiCarlo, Jerry Chow, Jay Gambetta, Lev Bishop, Johannes Majer, Alexandre Blais, Luigi Frunzio, Steven Girvin, Robert Schoelkopf
Demonstration of Two-Qubit Quantum Algorithms with a Solid-State Electronic Processor
 
10:40-10:55 SP-O2: Tetsuya Mukai, Christoph Hufnagel, Kouichi Semba, Fujio Shimizu
Superconductive Atom Chip towards Quantum Operations
 
10:55-11:10 SP-O3: Thomas Akira Ohki, A. Herr, J. Lisenfeld, A. V Ustinov, S. Poletto, A Savin, J Hassel
RSFQ Readout of Single-Qubit Coherent Oscillations
 
11:10-11:30 SP-O4 (Invited): Akira Fujimaki, Ryo Kasagi, Katsumi Takagi, Irina Kataeva, Hiroyuki Akaike, Masamitsu Tanaka, Naofumi Takagi, Nobuyuki Yoshikawa, Kazuaki Murakami
Demonstration of 2x3 Reconfigurable-data-path Processors with 14000 Josephson Junctions
 
11:30-11:50 SP-O5 (Invited): Donald L. Miller, Quentin P. Herr, John X. Przybysz
An SFQ-Driven 10mV Josephson Junction Output Driver
 
11:50-12:05 SP-O6: Y. Yamanashi, T. Kainuma, M. Igarashi, H. Hara, K. Taketomi, H. Park, H. Suzuki, Y. Natsume, N. Yoshikawa, H. Akaike, M. Tanaka, K. Takagi, I. Kataeva, R. Kasagi, M. Itoh, A. Fujimaki, S. Nagasawa, M. Hidaka
100 GHz Demonstrations Based on the Single-Flux-Quantum Cell Library for the 10 kA/cm2 Nb Multi-Layer Process
 
12:05-12:20 SP-O7: Coenrad J. Fourie, Thomas Ortlepp
Verification of Three-Dimensional Inductance Extraction Software by SQUID Measurements
 

SSV 2009 sponsored by JST in cooperation with JST-CREST SFQ Project and MEXT SFQ Project